AICRA Certified Technology Expert is the highest level of accreditation achievable and recognizes the automation expertise of electronics engineers who can support the increasingly complex designing of automation projects of global organizations and effectively translate business strategies into evolutionary technical strategies. This certificate is accepted very well in automation industry worldwide as the most prestigious Robotics certification.


Prepare For & Take The AICRA ACTE Exam

Step 1: You must pass the two-hour, written qualification exam covering those technologies that comprise industries automation solution before you are eligible to schedule the practical exam.

Step 2: The six-hour practical tests your ability to get the certification for ACTE. You must make an initial attempt of the ACTE practical exam within 12-months of passing the ACTE written exam. If you do not pass the practical exam within two years of passing the written exam, you must retake the written exam before being allowed to attempt the practical exam again.


  • Embedded C-programming concepts Optimizing for Speed/Memory needs
  • Interrupt service routines
  • Macros
  • Functions
  • Modifiers
  • Data types,
  • Device drivers
  • Multithreading programming. (Laboratory work on J2ME Java mobile application).
  • Linear data structures
  • Stacks and Queues Implementation of stacks and Queues Linked List - Implementation of linked list
  • Sorting
  • Searching
  • Insertion and Deletion
  • Nonlinear structures - Trees and Graphs Object Oriented programming basics using C++ and its relevance in embedded systems.
  • Fundamental concept
  • Relation b/w logic and logic programming
  • Encoding of data structure and algorithms
  • Implementations technique: interpreter and compilation
  • Digital signal processing
  • Sampling of analog signals
  • FIR filters
  • FIR filter structures
  • FIR chips
  • IIR filters
  • Specifications of IIR filters
  • Standard DSP architecture
  • Ideal DSP architectures
  • Multiprocessors and multicomputer
  • Systolic and Wave front arrays
  • Shared memory architectures
  • Mapping of DSP algorithms onto hardware
  • System-level and SoC design methodologies and tools
  • HW/SW co-design: analysis
  • partitioning
  • Real-time scheduling
  • Hardware acceleration
  • Virtual platform models
  • Co-simulation and FPGAs for prototyping of HW/SW systems
  • SoC and IP integration
  • Verification and test